Fixed-Point Designer
Model and optimize fixed-point and floating-point algorithms
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Fixed-Point Designer provides data types and tools for optimizing and implementing fixed-point and floating-point algorithms on embedded hardware. It includes fixed-point and floating-point data types and target-specific numeric settings. With Fixed-Point Designer you can perform target-aware simulation that is bit-true for fixed point. You can then test and debug quantization effects such as overflows and precision loss before implementing the design on hardware.
Fixed-Point Designer provides apps and tools for analyzing double-precision algorithms and converting them to reduced-precision floating point or fixed point. Optimization tools enable you to select data types that meet your numerical accuracy requirements and target hardware constraints. For efficient implementation you can replace computationally expensive design constructs with hardware-optimal patterns such as compressed lookup tables.
Production C and HDL code can be generated directly from your fixed- and floating-point optimized models.
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Fixed-Point Specification
Specify the fixed-point properties of your design with application-specific word lengths, binary-point scaling, arbitrary slope and bias scaling, and control details such as rounding and overflow modes.
Specifying a fixed-point data type and all its properties, such as rounding mode.
Floating-Point Simulation
Emulate target hardware behavior for denormal floating-point numbers, such as flush-to-zero, in simulation and code generation. Simulate limited-precision floating-point with fp16 half-precision data type in MATLAB and Simulink.
Instrumentation and Visualization
Collect simulation data and statistics through automatic model-wide instrumentation. Collect range data to explore and analyze your designs. Use visualizations to optimize your design for efficient hardware resource utilization.
Visualizing signal ranges and the histogram data.
Derived Range Analysis
Derive signal ranges based on mathematical analysis of your design and determine the worst-case ranges or edge cases, without having to create fully exhaustive simulation test benches. Using derived ranges, you can make sure your design prevents or handles all possible overflows.
Deriving ranges using design ranges.
Fixed-Point Quantization
Explore different fixed-point data types and their quantization effects on numerical behavior of your system with a guided workflow. Observe the dynamic range of variables in your design and ensure that the algorithm behaves consistently in floating-point and fixed-point representation after conversion.
Converting a floating-point model using the Fixed-Point Tool.
Floating-Point Quantization
Automatically convert a design from double precision to single precision and analyze the effects of limited-precision floating-point representation and quantization in single precision.
Automatic conversion using the Single Precision Converter.
Data Type Optimization
Automatically iterate through various fixed-point configurations to choose the optimal heterogenous data types while meeting tolerance constraints on the numerical behavior of your system. The optimization seeks to minimize the total bit-width using fixed-point data types for an efficient design.
Function Approximation and Lookup Table Compression
Approximate mathematically complex functions (such as sqrt and exp) or complex subsystems with an optimal lookup table. Compress existing lookup tables to reduce memory usage by optimizing data points and data types.
Generate Bit-True Code
Ensure bit-true agreement across Model-Based Design from simulation to code generation, including acceleration as well as processor-in-the-loop and software-in-the-loop simulations. Analyze and verify fixed-point algorithms based on bit-true representations. Generate efficient code from reduced precision designs including those with half-precision data types.
Verifying the bit-true behavior of generated code in a simulator.
HDL Optimized Matrix Blocks
Access a Fixed-Point HDL Library of Simulink blocks that model design patterns for systems of linear equations and core matrix operations, such as QR decomposition, for hardware-efficient implementation on FPGAs. Generate HDL code for designs that incorporate these blocks using HDL Coder.
Library block that provides an HDL optimized design pattern for QR decomposition.
Overflow and Precision Loss Detection
Quickly identify, trace, and debug sources of overflow, precision loss, and wasted range or precision, and compare your design against ideal floating-point behavior. Bit-true agreement of your model and code maximizes many benefits of Model-Based Design enabling you to discover such issues early in the workflow.
Tracing the root cause of an overflow.
Test Numerical Edge Cases
Generate numerically rich fixed-point and floating-point values, such as values close to boundaries and denormal numbers, to test edge cases of your algorithms for numerical consistency. Generate combinations of signals with varying dimensions and complexity, and with integer, floating-point, or fixed-point data types.
Generating test data with data generator APIs.
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